Technologist , ASIC Development Engineering (Emulation Engineer,DFT ,UPF, Zebu or Palladium, Methodology)

 

• The ASIC emulation team is seeking highly motivated engineer to join a team of experienced engineers working on the development of advanced controller SoCs.

As a Technologist Emulation Engineer in the ASIC Emulation team, you will be responsible for enabling new emulation & verification technology for the larger ASIC team.  This includes traditional verification technology that is now being accelerated by GenAI and accelerating verification of DFT and UPF with emulation.  This unique position requires a mix of verification and emulation skills. 

The growing diversity of data creates an exponential number of new possibilities – for the world, our company, and you. You’ll be part of a team driving the innovations necessary to outpace new demands and challenges everywhere data lives, from sensors to mobile devices to the cloud. We’ve only started to scratch the surface of what data can do. You can help unlock its full potential.

• Providing technical leadership and expertise to define requirements for Emulation and Emulation IP development.
• Partnering with ASIC engineers to deploy new technologies like emulation acceleration, advanced verification environment configuration and management, and AI technology for verification and emulation.
• Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for DFT and UPF emulation acceleration.
• Collaborating cross-functionally to optimize verification and emulation workflows and standardize methodologies.
• Work with extended teams to debug environment and drive cross-functional testing (Firmware, Software, Verification and Design)
• Triage failures with design, verification, firmware, software teams
• Mentoring and guiding junior engineers, fostering a culture of collaboration, innovation and continuous improvement.

• BE or MS degree in Electrical Engineering or Computer Engineering, with 13+ years of experience.
• Solid experience working on emulation platforms such as Veloce, Zebu, or Palladium (compilation, debug, performance, and throughput tuning)
• Debugging experience is a must particularly in HW/SW co-debug environments
• Understanding of SystemVerilog UVM and verification methodologies especially testplan creation and constructs of testbench architecture. Able to debug problems between verification and emulation.

Skills Required:

• Programming and automation skills in Python, TCL and PERL
• Working knowledge of Linux/Unix environment and shell scripting
• Excellent debugging and problem-solving skills with simulation and emulation environments.
• Cross-Functional Collaboration: Ability to work closely with design, validation, firmware, and physical design teams to resolve system-level issues.
• Strong team player, able to collaborate effectively across architecture, design, and validation teams.

Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.

Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.