Power Analysis and Optimization Engineer
NVIDIA
Posted: March 23, 2026
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Quick Summary
Power Analysis and Optimization Engineer is responsible for defining power targets for chip performance optimization and identifying power-saving opportunities throughout the ASIC design process. This role requires expertise in power analysis and optimization techniques, as well as strong communication skills to work closely with IP teams and engineers.
Required Skills
Job Description
Not only pursuing the outstanding chip performance, NVIDIA also keeps chasing for the power efficiency in every product. Perf-per-Watt is crucial to us. Power Analysis and Optimization Team is responsible for helping IP teams to define power targets with any architecture change or new added feature; to find power saving opportunities throughout the ASIC design process, starting from architecture define to the P&R stage; and to solve any potential power issues that might have negative impacts on functionality and performance. As a member of our team, you will work closely with IP Architects, ASIC Design/Verification Engineers, Physical Design team and many other teams to meet the pre-defined power targets. Your contributions will make each Nvidia GPU and SOC products be more energy efficient, achieve excellent Perf-per-Watt and maintain the competitive advantage in the market.
What you'll be doing:
• Understand Functionality, Architecture, Feature Algorithm and RTL implementation of IP design.
• Create dedicated IP-level Power model for early power estimation, if any architecture change or new added feature needed.
• Co-work with IP owner to define the power target with different workloads and application scenarios.
• Use internal-developed power flow and analysis tools to look for power saving opportunities; drive IP owner to implement the fixes.
• Explore new methodology to identify more wasted activities in the design and find solutions to save the power.
• Develop automation flow to help improve the efficiency of power analysis.
What we need to see:
• MS with 1~3 years of experience or PhD in related fields.
• Basic understanding of the concept of power and common low power design techniques.
• Familiar with PTPX, PowerArtist and ASIC design flow including RTL coding, synthesis, P&R.
• Strong coding skills, preferably in Python, C++, tcl script.
• Good verbal/written English and communication skills.
Ways to stand out from the crowd:
• Low power design experience is a big plus.
• Power Modeling/Analysis experience is a plus.
We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.