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Signal and Power Integrity Engineer

Intel Corporation

US, California, Santa Clara permanent

Posted: February 27, 2026

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Quick Summary

Signal and Power Integrity Engineer with expertise in designing and developing high-performance integrated circuits for the semiconductor industry. This role involves working with a team to design and test complex signal integrity systems, ensuring high-speed data transmission and low-latency communication. Strong understanding of semiconductor design, test, and verification methodologies is required.

Job Description

Job Details:

Job Description:

Intel® Integrated  Photonics Solutions (IPS) is at the forefront of silicon photonics integration and is part of The Data Center Group which is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing-devices. Since announcing the world’s first hybrid silicon laser nearly a decade ago, our team continues to lead the industry with cutting-edge technology and efficient, scalable high-volume manufacturing. Our dedication to advanced development ensures that Intel Silicon Photonics continues to drive future data center bandwidth growth with smaller form factors, co-packaging and higher speeds from 400G today to 1.6T+ and beyond tomorrow. We are looking for great talent to accelerate this journey so if you are interested in joining our leading organization then we want to hear from you. 

The team is seeking an experienced Hardware Designer with expertise in SI and PI to support the development of reference module designs, PIC sub-system EVB and other test boards to support product development. Demonstrated expertise in designing 100G/lane and 200G/lane module PCBA, lead the layout execution for high-speed traces, power delivery, require extensive experience with designing PDN for high-speed DSP, RFICs, manage PI and SI requirements, actively guide layout engineer and manage tradeoffs in design. The candidate will be expected collaborate with a cross functional product development team - HW, FW, PIC, EIC, Packaging and thermal, Optics and NPI.

Job responsibilities include but are not limited to:

• Perform SI simulations of high-speed interfaces, RF traces, etc. 100Gbps, 200Gbps NRZ and PAM4 signaling.

• Modeling of high speed traces with vias, connectors, sockets and various system components in 3D EM tools like HFSS, ADS.

• Design and optimize Power Delivery Network (PDN) across packages and PCBs.

• Perform PI sims for IR drop, current density violations, dynamic switching noise analysis to validate board designs.

• Expertise in designing 100G/lane and 200G/lane module PCBA, lead the layout execution for high-speed traces, power delivery, require extensive experience with designing PDN for high-speed DSP, RFICs, manage PI and SI requirements, actively guide layout engineer and manage tradeoffs in design.

• Ability to lead hardware design of an optical transceiver and evaluation boards including schematic design, circuit simulation, PCB layout floor planning, design with layout engineer is a plus.

• Lead PCB bring up working with FW engineers to confirm functionality w.r.t design targets. Validate PCB high speed designs thru product design verification tests and independent PCBA characterization. Troubleshoot and optimize performance of the sub-system/transceiver module boards.

• Extensive experience with selection of DSP, Driver, TIA, uControllers, DACs, ADCs, Voltage regulators, etc.

• Key contributor to Product Requirements, Owns PCBA design from concept phase to full final design and EVT/DVT phase of the product.

• Understand electrical and optical requirements and specifications of optical transceiver MSA. Like 800G DR8/2xFR4, 1.6T DR8/2xFR4, 800G LPO, 1.6T LRO etc.

• Maintain documentation of a hardware design specification, Pass design check list prior to tape out, BOM specifications and work with NPI team to build PCBA. Lead design reviews and present design summary to management, highlight risks with mitigation plans.

• Interface and work collaboratively with mechanical engineers, optical engineers, Photonics engineer, firmware engineers, process engineers and test engineers.

• Interact with program manager, buyer/planner and suppliers to make sure designed parts are available in a timely manner for build and test.

Qualifications:

You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Minimum Qualifications

• M.S. in Electrical Engineering
• 3+ years of experience in high-speed signal integrity, crosstalk, power integrity, noise, ESD/EMI, testing, etc.
• 3+ years of experience in PI and SI tools (HFSS, Sigrity, Cadence)
• 3+ years of experience in:• transceiver electrical design principles, including high speed signal integrity,
• layout and able to direct layout engineer with clear design priority
• high density multiple-layer board design.
• high volume PCB/substrate fab house
• HW/circuit design experience

Preferred Qualifications

• Ph.D. in Electrical Engineering with specialization in RF/Microwave design
• Strong analog and digital circuit design skills and layout with mixed signal designs.
• Experience working with AWG, DCAM, VNA/LCA to characterize high speed performance
• 4+ years of experience in ADS
• Strong laboratory optical and electrical measurement skills.
• Strong communication and presentation skills.
• Experience with micro-controllers and communication protocols such as SPI, I2C, MDIO, CMIS management interface for optical modules.
• Strong background of digital communication theory.
• Familiarity with industry standards including IEEE Ethernet standards, OIF standards, PCIe standards and various MSAs.
• Experience with optical transceiver test and calibration methodologies.
• Experience working with Marvell, Broadcom, MaxLinear, Credo DSPs in pluggable optical modules

          

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Santa Clara

Additional Locations:

Business group:

At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. 

 

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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