Senior Mixed Signal Circuit Design Engineer

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. We are now looking for a Senior Mixed Signal Design Engineer to be part of the Mixed Signal design team building next generation NVLINK. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. The team is responsible for the development and implementation of high-speed interfaces and analog circuits. Gain hands-on experience taking innovative integrated circuit designs at data rates of 100Gbps and higher from concept through silicon characterization. Come join our dynamic team today! What you'll be doing: You will be part of the design and implementation of high-speed interface circuits; Have the chance to create projects including high speed transceivers and high frequency PLLs. Become involved in the design, simulation, and verification of mixed-signal circuits; Lead mask designers, provide mentorship for floorplan and layout design. Provide support to the lab characterization of silicon and pursue the challenges of circuit design in deep submicron CMOS. You will take designs through implementation and productizing. Collaborate with multi-functional teams. What we need to see: BS or MS in Electrical Engineering, PhD preferred (or equivalent experience) 5+ years of design experience in CMOS analog / mixed-signal circuit Working knowledge of Cadence custom design tools, circuit simulator, timing analysis tool; Your extensive design experience in Data Converters, Tx, Rx, CDR, PLL for high-speed IO interfaces. Someone who's an exceptional teammate with good interpersonal skills; Validated experience in leading and mentoring designers. In-depth understanding of deep submicron CMOS process and related circuit design issues; Proven experience in silicon bring-up, debugging and use of lab instrumentation is required. Knowledge in system level timing budget, signal integrity, and power integrity is a plus; Experience in Verilog, Matlab, Nanotime is helpful. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.