Senior Logic Design Methodology Engineer

Job Details:

Job Description:

Intel is seeking an experienced Logic Design Methodology Engineer for the Intel Chassis Group. The Chassis Group is chartered to deliver the chassis for multiple SoCs within Intel. The group is looking for a skilled individual with hands-on experience in RTL flows and methodologies, coding and effective use of AI tools to help define and maintain flows that can effectively deliver high quality IP to the SoC teams
As a Design Methodology Engineer, your responsibilities will include but are not limited to
• Development and implementation of strategies, tools and techniques for development of high-quality design that can meet power, performance, and area targets and achieve predictability in physical design
• Collaboration with architecture/logic design/verification teams to refine methodologies to address gaps and achieve quality improvement targets.
• Enablement of AI methodologies and tools to drive efficiency gains in IP development areas such as RTL design, testbench generation and modelling
• Proactive keeping up with advances in tool flows and methodologies and incorporating them in the Chassis development flows

Qualifications:

Minimum Qualifications
• Bachelor's/Master's degree in Science, Electrical Engineering or equivalent with 7+ years of experience in state-of-the-art SOC and/or IP design
Preferred Qualifications
• 5+ years' of proficiency in tools, flows and methodologies (TFM) used for logic design and verification, including in scripting languages such as Python, Perl or Shell
• Expertise in deploying AI tools for productivity gains across the silicon development cycle
• Experience in working with architecture, design, integration, and verification teams
• Familiarity with Verilog/System Verilog, Lint/CDC/RDC, synthesis and physical design
• Good understanding of power, performance and area trade-offs in designs
In addition to the qualifications a successful candidate will demonstrate:
• Problem-solving and analytical skills
• Communication skills
• Capacity to work across large, geographically distributed engineering teams across multiple time zones.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Business group:

The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.