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Principal Engineer, STA & Synthesis

RenesasElectronics

Hyderabad, , India permanent

Posted: December 15, 2025

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Quick Summary

We are seeking a Principal Engineer to join our team in Hyderabad, India, to develop a safer, healthier, greener, and smarter world.

Job Description

Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you.

Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world.

We are seeking a Principal Engineer – Implementation Lead to own synthesis and timing closure sign-off for low-power, chiplet-based MCU designs implemented on cost-optimized mature process nodes. This role is critical for ensuring design quality and convergence while meeting power, performance, and cost targets.

 

Job Description

• Drive RTL-to-gate synthesis for complex multi-die MCU designs using industry-standard tools
• Optimize for timing, power, and area while adhering to mature-node constraints
• Lead static timing analysis (STA) and timing closure activities across multiple corners and modes
• Ensure sign-off compliance for timing, power, and signal integrity
• Work closely with RTL, DFT, and physical design teams to resolve timing issues
• Own full chip constraints and design optimizations to achieve convergence
• Define and maintain synthesis and timing closure methodologies tailored for cost-sensitive MCU designs
• Evaluate EDA tools and flows for improved efficiency and turnaround time

Qualifications

• BTech/MTech in Electrical/Electronic Engineering, Computer Engineering or Computer Science with 15+ years of experience in  ASIC/SoC implementation
• Proven experience in mature-node technologies (e.g., 22nm, 12nm) and low-power design strategies and multi-clock domain designs
• Expertise in Synopsys/Cadence synthesis tools and STA tools
• Expertise in multi-mode, multi-corner timing analysis and constraint management
• Experience in timing closure of external interfaces like SPI/I2C/Ethernet/CAN
• Experience with hierarchical timing closure
• Experience with UPF/CPF-based power intent and low-power optimization techniques (clock gating, multi-voltage domains).
• Extensive experience with ECO flows for timing fixes and late-stage design changes
• Strong scripting skills (Tcl, Perl, Python) for automation of synthesis and STA flows
• Experience with timing sign-off for chiplet-based designs is a strong plus
• Strong communication skills (written and verbal), problem solving, teamwork, attention to detail, commitment to task, and quality focus
• Can – do attitude, openness to new environment, people and culture
• Ability to propose innovative and leading edge solutions
• Strong drive & ability to coordinate work across highly experienced global teams

Renesas is an embedded semiconductor solution provider driven by its Purpose ‘To Make Our Lives Easier.’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power.

 

With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘To Make Our Lives Easier.’     

 

At Renesas, you can: 

• Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things.  

• Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. 

• Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day.    

Are you ready to own your success and make your mark?  

Join Renesas. Let’s Shape the Future together.  

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

We have adopted a hybrid model that gives employees the ability to work remotely two days a week while ensuring that we come together as a team in the office the rest of the time. The designated in-office days are Tuesday through Thursday for innovation, collaboration and continuous learning.

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