Lead EDA Tools Engineer

Job Details:

Job Description:

The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.

Intel Integrated Photonics Solutions (IPS) is at the forefront of silicon photonics integration and is part of The Data Center Group which is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing-devices. Since announcing the world's first hybrid silicon laser nearly a decade ago, our team continues to lead the industry with cutting-edge technology and efficient, scalable high-volume manufacturing. Our dedication to advanced development ensures that Intel Silicon Photonics continues to drive future data center bandwidth growth with smaller form factors, co-packaging and higher speeds from 400G today to 1.6T+ and beyond tomorrow. We are looking for great talent to accelerate this journey so if you are interested in joining our leading organization then we want to hear from you.

In this role, the EDA Engineer, the individual will be involved in leading/developing key CAD/design sign-off/tape out methodologies for high-speed mixed signal IC designs leading to High Volume Manufacturing (HVM) products. In this position, working on the development and support of next generation IC and Photonics design flows for Analog Mixed-Signal, Digital, ASIC or full custom circuits. As an experienced EDA engineer in the team, you will be required to assume a technical leadership role in the development of these design flows for multiple engineering customers (Internal or External) using industry standard EDA software such as Cadence, Mentor, Synopsys, etc. You will be responsible for new EDA tool evaluations, selections, support, collateral (PDK) configurations or CAD flow development for electronic ICs for Silicon Photonics products.

Responsibilities:
• Ensures the efficient planning, provisioning, installation/configuration, maintenance, and/or operations of the hardware and software infrastructure required to build, validate, and release a wide variety of hardware and software products and projects.
• Works closely with development and quality teams to derive infrastructure design requirements, build, test, and automate tools appropriate to the project, and/or implements and maintains of those systems within the constraints imposed by Intel enterprise infrastructure (IT) and other governing bodies.
• Owns the end-to-end delivery pipeline, including source code management, versioning/tagging strategy, component build and packaging, test automation tooling, release staging, acceptance and/or indicators, required security and IP scans, any third-party conformance tools, artifact storage and distribution, and disaster-recovery planning.
• Identifies opportunities and implements solutions for increased automation, reliability, and/or velocity within the pipeline through implementation of robust infrastructure telemetry, KPIs, and indicators, and by monitoring and applying industry best-practices.
• Provide guidance to junior infrastructure and DevOps, designers, and layout engineers. Participate in concept, schematic and final design reviews for circuit blocks.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences. 

Minimum Qualifications:
The ideal candidate should have a Bachelor's & 9+ years or Master's & 6+ years in Electrical Engineering or Computer Engineering with 6+ years of experience in EDA Infrastructure and DevOps development and sustaining in IC or photonics industry and 7+ years in the required skills section.

Required Skills:

• Experience in developing and maintaining automation tools and processes for Mixed-Signal IC design, PDK configuration, and leading multiple successful tape outs.
• Expertise with various Electronic Design Automation (EDA) software, flows and architecture.
• Understanding of Integrated Circuit (IC) simulation tools and related methodologies.
• Experience in front-to-back digital or analog flows (RTL to GDS expert, or SPICE to GDS expert)
• Experience with multiple CAD flows: frontend, backend, custom, digital, collateral (PDK, FDK)
• Programming skills: Unix, Perl, Python, Skill, Tcl, C/C or other.

Preferred Qualifications:

• Expertise in Optical communications infrastructure and DevOps.
• Domain Knowledge: Quality and Validation.
• Full Stack Software Frameworks.
• Hardware Infrastructure Management.
• High-Level Software Design.
• Information Security.
• Familiar with Intel Netbatch flow and methodology.
• Experience with analog schematic/layout porting from one technology node to another.
• Demonstrate experience with Cadence DFII environment such as Schematic Composer and/or Virtuoso Layout Editor.
• Demonstrate experience with Synopsys Analog tools such as Custom Compiler, Primesim and other Design Automation tools or scripts.
• Demonstrate experience with Synopsys Digital tools such as Design Compiler (DC), IC Compiler (ICC, ICC2), Primetime (PT) and other Logic Design Automation tools or scripts.
• Demonstrate understanding of RTL Synthesis, APR, Timing Closure (Physical Design and Verification)
• Demonstrate experience with Mentor Graphics software such as Calibre for DRC/LVS or Star-RCXT for Parasitic Extraction.
• Familiarity with external Foundries would be a plus (Samsung, TSMC, Global Foundries etc.)
• Experience with EDA and CAD vendor license format/syntax and parsing/reporting.
• Experience Tracking/automating license expirations and renewals; use knowledge of purchase agreements to advise engineering decisions on licenses available, purchase or renewals.
• Familiar with design data management tools such as Cliosoft and DesignSync.
• Fast learner, build expertise in diverse technical areas and adapt to a dynamic environment.
• Strong business acumen and strategic thinking, with the ability to collaborate with internal teams, external partners, and customers to identify custom needs and opportunities, ensure seamless integration and manufacturing.
• Excellent communication skills, both verbal and written, with the ability to effectively convey complex technical concepts to diverse audiences.
• Have strong problem solving, analytical skills and demonstrated ability to plan and manage projects.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Santa Clara

Additional Locations:

Business group:

At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $190,610.00-269,100.00 USD 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. 

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.