External Technology Integration Engineer

Job Details: Job Description: Join Intel's Elite Technology Integration Team and Shape Tomorrow's Computing Solutions! Are you a visionary engineer passionate about pushing the boundaries of semiconductor technology? Do you thrive on solving complex technical challenges while leading cross-functional teams in a fast-paced, innovation-driven environment? Intel is seeking an exceptional External Technology Integration Engineer to spearhead the integration of cutting-edge memory and foundry silicon technologies into our revolutionary EMIB and Foveros advanced packaging architectures. Transform Technology. Lead Innovation. Make Your Mark. This is more than just an engineering role—it's an opportunity to be at the forefront of semiconductor innovation, working with industry-leading technologies like High Bandwidth Memory (HBM), LP DDRs and Si nodes while collaborating with world-class internal teams and external partners. As our External Technology Integration Engineer, you'll drive critical technology milestones from concept to production, establishing the standards, design rules and specifications that will define the next generation of computing solutions. What You'll Accomplish: Lead the technical integration of external memory and/or foundry silicon technologies into Intel's advanced packaging platforms Drive comprehensive chip-to-package interaction (CPI) assessments across Si backend fab, bump, singulation, assembly, and test domains Qualify breakthrough foundry Si/memory technologies and establish innovative Si far back-end and bump design rules Orchestrate complex technical programs with multi-disciplinary stakeholders to deliver game-changing results Define package performance specifications and achieve technology certification through strategic test vehicle design layout and data collections Pioneer research on materials and properties to solve complex CPI failure mechanisms Establish critical material and process specifications for foundries and contract assemblers Lead and influence both internal and external stakeholders towards desired direction and timely execution. Provide succinct presentations to senior executive management team along with excellent verbal and written communication skills. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences. Minimum Qualifications: Education and Experience Requirements Bachelor's degree in Materials, Chemical Engineering, Chemistry, Physics, Mechanical Engineering with 6 years related field experience Master's degree in Materials, Chemical Engineering, Chemistry, Physics, Mechanical Engineering with 4 years related field experience PhD degree in Materials, Chemical Engineering, Chemistry, Physics, Mechanical Engineering with 2 years related field experience Technical Experience Requirements Manufacturing Process Integration 2 years developing and qualifying microelectronic packaging processes for high-volume manufacturing (OR) 2 years integrating complex packaging assembly components including design specifications, manufacturing processes, materials selection, and tooling requirements (OR) 2 years managing technical programs with demonstrated experience in: (OR) Technical planning and scheduling Program execution and monitoring Completion of packaging assembly process certifications 2 years managing external relationships including: Supplier process, material, and tool management Customer program management with committed delivery schedules Preferred Qualifications: Experience in various versions of 2.5D and 3D advanced package architectures in the industry, their fabrication processes/materials/tools and their interaction and driving yield improvement activities for these advanced package architectures. Extensive experience in conducting failure mode and effects analyses (FMEA), technical risk assessments (TRA) and statistical process control (SPC) analyses. Experience in defining a silicon - package architecture through fit study, technical risk assessments along with design for yield (DFY) and design for reliability(DFR) considerations. Extensive experience in Si far-backend fab processes, memory/packaging technology, memory silicon/package interactions, silicon and/or package debug verifications, structure property relationships and material characterizations. Experience in model-based problem solving (MBPS) methodologies and quality/yield management through 8D templates Experience working with foundries, OSATs and familiarity with Si design, tape-in/tape-out processes. Experience with using EDA tools and Si design collaterals, signal integrity (SI) parameters and power characterization and high-speed IO signaling. Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Arizona, Phoenix Additional Locations: US, Oregon, Hillsboro Business group: Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel . Annual Salary Range for jobs which could be performed in the US: $164,470.00-311,890.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.