Engineer, Senior or Principal- Electronic Design
dstaff
Posted: August 31, 2015
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Quick Summary
Join Broadcom's Infrastructure Networking Group to develop, characterize, and qualify high-speed broadband networking devices, including 10/40/100 Gigabit Ethernet-based transceivers, Fibre Channel PHY to build fiber channel disk drive arrays, and 10 Gbps SFP+ over structured cabling in data centers.
Required Skills
Job Description
Engineering
Engineer, Senior or Principal- Electronic Design
Degree Masters
Visa candidates welcome
Bounty Description In this role you would join Broadcom's Infrastructure Networking Group in developing, characterizing and qualifying high-speed broadband networking devices.
Our products include (1) 10/40/100 Gigabit Ethernet-based transceivers enabling manufacturers to build affordable 10 Gigabit Ethernet-based SFP+ over structured cabling in the data center, (2) Fibre Channel PHY to build fiber channel disk drive arrays, blade servers, and fibre channel storage systems, and (3) 10G SONET/SDH/OTN transceivers for telecommunications and service providers to efficiently deliver data and voice traffic over existing fiber networks.
In this position you will:
- Develop comprehensive test plans and test strategies for post-silicon analog electrical parameters of physical layer (PHY) SerDes (Serializer and Deserializer) of high-speed broadband Mix-signal ASICs.
- Develop and optimize PHY electrical bench test methodologies and procedures per industry standards - 10GbE (IEEE 802.3ae, IEEE 802.3ak, IEEE 802.3ap, IEEE 802.3aq), 40/100GbE (IEEE 802.3ba, IEEE 802.3bg), and 100GbE (IEEE 802.3bj, IEEE 802.3bm).
- Perform post-silicon PHY bench testing of analog electrical parameters of high-speed broadband Mix-signal ASICs.
- Lead and train junior engineers.
- Generate comprehensive test reports and analysis.
- Develop and implement bench test automation.
- Collaborate with IC design team on chip performance optimization and failure analysis.
Job Requirement:
EE PhD or MS with minimum 6+ year working experience in high-speed broadband communication post-silicon analog test environment.
Must be an expert in PHY test methodologies specified in at least one of above listed IEEE standards.
Notes:
This job requirement should focus on physical interface I/O electrical parameter test which is analog in nature and get into RF region with today’s ever higher data rate. We use Keysight DCA-J and J-BERT extensively.
Candidate Details
Years of experience not specified
Management Experience Required - No
Minimum Education - Master's Degree
Willingness to Travel - Never
Skills and Certifications
PHY electrical bench test methodologies and procedures per industry standards - 10GbE (IEEE 802.3ae,
All your information will be kept confidential according to EEO guidelines.
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