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CPU Core Pre-Si Validation/Verification Eng

Intel Corporation

US, California, Folsom permanent

Posted: April 14, 2026

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Quick Summary

We are looking for a CPU Core Pre-Si Validation/Verification Engineer to join our team in Folsom, CA. The ideal candidate will have a strong background in CPU design and validation, with a passion for working on the frontend of silicon chips.

Job Description

Job Details:

Job Description:

Do Something Wonderful!Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and have a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

Who We Are

We are working on the CPU design in Folsom. The team in Folsom has the frontend team working on ucode, RTL and validation. We also have a backend team working on circuit design, structural design, low power design. Finally, we have a backend integration working on full-chip timing, layout and design integration.

Who You Are

Responsibilities include but are not limited to:

• Defines, develops, and performs functional validation for CPUs, focusing on validation of the CPU internals and CPU integration in system level features for Intel performance and power efficient cores.
• Apply various hardware and software level tools and techniques to ensure validation coverage and that performance, power, and area goals are met.
• Reviews proposed design changes to assess impact on validation plans, tasks, and timelines.
• Develops CPU validation methodologies and test plans, executes validation plans, and collaborates with other engineers for design optimization, troubleshooting, and failure analysis.
• Applies knowledge of CPU core architecture, processor microarchitecture, and design.
• Performs silicon debug to identify root causes and resolve all functional and triage failures for CPU issues.
• Tests interactions between various CPU features using validation infrastructure.
• Develops post-silicon validation infrastructure (e.g., performance monitors, behavioral checkers, state space coverage) and test environment used in validation testing.
• Publishes CPU validation reports summarizing all validation activities performed, reviews results, and communicates to relevant teams.
• Works with architecture, design, verification, board, platform, and manufacturing teams to maintain and improve debug, validation test strategy, methodologies, and processes for CPU interfaces and to meet desired product specifications.
• Develop content to create or increase specific IP interactions using a variety of tools and techniques (including patching techniques using microcode, firmware, or custom OS builds).
• Engages in all phases of the product life cycle, develops, and validates content and infrastructure, and bug hunts in multiple environments (simulation, emulation, FPGAs) to ensure silicon readiness.

Qualifications:

You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications
Bachelor's degree in Electrical/Computer Engineering, Computer Science or other Science/Engineering related field and 3+ years of experience in Pre-silicon verification and/or front end or Master's Degree in Electrical/Computer Engineering, Computer Science or other Science/Engineering related field and 2+ years of experience in Pre-silicon verification and/or front end.

• Software/programming languages (i.e. C, C++, C#, Visual Basic/.NET. Perl, Python, Java, etc.) System Verilog/Verilog/VHDL, Verification, Validation and/or VCS or similar Simulator.

Preferred Qualifications

• Minimum of 6 months' experience with computer architecture and microarchitecture.
• Experience with coverage driven validation.
• Experience in IP/SOC ASIC Validation.
• Experience in Specman E and/or System Verilog/OVM/UVM.
• Experience with software design and coding.
• Knowledge with x86 core architecture and instruction set.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Folsom

Additional Locations:

Business group:

Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $141,910.00-200,340.00 USD 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. 

 

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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