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United States- Remote (Los Angeles) Remote permanent
Physical DesignRTLSynthesisFloorplanningClock Tree SynthesisStatic Timing AnalysisPhysical VerificationTiming ClosurePPA OptimizationAutomation tool proficiency

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by $450M from leading investors including Altimeter ...

April 7, 2026 View Details

Senior Physical Design Engineer (Digital) – Contract

Firmenname für EXPERT-Mitglieder sichtbar

Archived Remote
Timing constraintsRTL-to-gate synthesisClock tree designLow-power optimizationAI-driven design flow enhancements

Join a highly skilled team of engineers to design advanced MCU SoC development for cutting-edge digital transformation initiatives....

April 7, 2026 View Details
2 Locations permanent
Electrical EngineeringRTL DesignPhysical DesignTCL ScriptingCross-functional CollaborationHigh-quality DesignEDA ToolsLayout ToolsNetlist-to-GDSII

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. To...

April 6, 2026 View Details
Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States (Austin, Fort Collins, Santa Clara) Hybrid permanent
Improving PPA and runtimeDevelop RTL-to-GDS methodologies

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must...

April 3, 2026 View Details
Israel, Yokneam permanent
Physical DesignASIC Design FlowPower IntegrityPhysical InstallationEDA ToolsTeamworkEMIR Flows

NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering t...

April 3, 2026 View Details
Pune, Maharashtra, India permanent
PPAOptimizationAnalysisReferenceFlowDevelopmentCustomerIntegrationSupportEducationExperienceTapeout

Quadric delivers its GPNPU as soft IP — RTL and implementation collateral — enabling customers to integrate our processor into their own SoCs across a range of process nodes and foundries. You will dr...

April 3, 2026 View Details

Physical Design Engineer

RenesasElectronics

Zhubei, , Taiwan permanent
Physical DesignCadence VoltusFloor PlanTiming ClosureLayout ImplementationFormal VerificationHigh-Voltage SubstationsAdvanced NodesAPRMulti-Corner DesignsLower Power Design

Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offeri...

April 2, 2026 View Details
San Jose, California, United States (San Jose, CA) permanent
Timing AnalysisSignal IntegrityPhysical DesignSoC DesignSynthesisPlace-and-RouteExtractionEquivalence CheckingTSMC ProcessAdvanced NodesAutomated Timing Closure

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizati...

April 2, 2026 View Details

SoC Physical Design Engineer

Intel Corporation

2 Locations permanent
Electronic EngineeringEDA ToolsPhysical DesignSynthesisFloor PlanningDatacenter Power SystemsPlace and RouteStatic Timing AnalysisVerificationSignal IntegrityClock TreeRC-Extraction

Job Details: Job Description: • To work on Intel's next generation Client CPU SoC with latest process technology in the era of hyper scale computing. • Responsibilities: Responsible to implement co...

April 2, 2026 View Details
Noida, , India permanent
Physical DesignRTL SynthesisLow-Power DesignLECTCL ScriptingTeam LeadershipDebuggingCross-Functional CollaborationUPF DevelopmentVCLP

Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offeri...

April 1, 2026 View Details

Physical Design Engineer

Firmenname für EXPERT-Mitglieder sichtbar

Archived Remote
GitTeamsGo

Perform floorplanning, placement, and routing for advanced-node chips, working closely with RTL and verification teams....

April 1, 2026 View Details
Muscatine, IA Hybrid permanent
CAD2D3DInformation ProvidingConfirmation DraftingCoordinationNESCIEEE 80IEEE 605IEEE 998NFPA 780

Stanley Consultants is an award-winning and industry-leading global consulting engineering firm, with an unmatched commitment to culture, values, and ethics. We are dedicated to client experience and ...

March 25, 2026 View Details
China, Shanghai permanent
Physical DesignRTLSynthesisFormal VerificationTiming ClosurePartitioningFlow AutomationEDI SoftwareEnglish CommunicationConstraint

ASIC-PD team is hiring engineers, whose work scope is physical design from RTL to GSDII: design quality check, synthesis, formal check, partitioning, constraint (for both design and process), async ch...

March 31, 2026 View Details
San Jose, California, United States (San Jose, CA) permanent
Physical DesignCADEDAPlace and RouteSynthesisTiming ClosureDRCLVSSynopsysCadenceEM-IRFormality

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizati...

March 31, 2026 View Details
Israel, Tel Aviv permanent
Physical DesignRTL QC ToolsSynthesisPower DistributionPlace and RouteTiming ClosurePower AnalysisPhysical VerificationEDA ToolsTeamwork

NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering t...

March 31, 2026 View Details
Malaysia, Penang permanent
Physical DesignIP level verificationSynthesisPlace and RouteClock Tree SynthesisFloor PlanningStatic Timing AnalysisPower DistributionFormal VerificationTiming AnalysisCoverage Driven VerificationSoC Designs

Job Details: Job Description: About the Foundry Technology Development Group: Foundry Technology Development (Foundry TD) is the heart and soul of Moore's Law at Intel, enabling Intel to create worl...

March 31, 2026 View Details

Physical Design Lead

Intel Corporation

Malaysia, Penang permanent
Physical DesignRTL DesignSynthesisPlace and RouteClock Tree SynthesisStatic Timing AnalysisPower IntegrityEDA ToolsCollaboration

Job Details: Job Description: About the Foundry Technology Development Group: Foundry Technology Development (Foundry TD) is the heart and soul of Moore's Law at Intel, enabling Intel to create worl...

March 31, 2026 View Details
Eindhoven, North Brabant, Netherlands Remote permanent
Physical DesignSynthesisFloorplanningPlace and RouteTiming AnalysisPhysical VerificationConstraints ManagementEDA ToolsTCLPython

About Us Axelera AI is not your regular deep-tech startup. We are creating the next-generation AI platform to support anyone who wants to help advancing humanity and improve the world around us. In ...

March 30, 2026 View Details

Senior Physical Design Engineer (m/w/d)

Firmenname für EXPERT-Mitglieder sichtbar

Archived
Physical DesignCadence ToolsTiming ClosureFloorplanningPlacementRoutingLayout OptimizationCommunicationRTL-to-GDS ImplementationClock Tree OptimizationDFT IntegrationCongestion Analysis

A Senior Physical Design Engineer is required to design and implement digital ASIC blocks from RTL to GDS, with expertise in RTL synthesis, timing, and layout....

March 29, 2026 View Details

Physical Design Engineer

ScadeaSolutionsInc

Archived San Diego, CA, United States contract
Physical DesignTiming ClosurePower PlanningCTSPV

About Us : Scadea Solutions is a global talent acquisition and executive search company. We work exclusively with some of the most reputed and admired clients across various sectors and geographies. ...

July 15, 2016 View Details
United States - Remote Remote permanent
Physical DesignSynthesisFloorplanningTiming ClosurePPA OptimizationPhysical VerificationVerificationCollaborationAutomationDRAM IntegrationEcologicalAssessments

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by $450M from leading investors including Altimeter ...

March 27, 2026 View Details
United States - Remote (Los Angeles) Remote permanent
ASIC DesignPhysical DesignRTL DesignClock Tree SynthesisStatic Timing AnalysisPhysical VerificationDesign AutomationTool SelectionProcess TechnologyProject Leadership

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by $450M from leading investors including Altimeter ...

March 27, 2026 View Details

Lead Physical Design Engineer

NXP Semiconductors

Bangalore permanent
Physical DesignFloorplanningPlacementRoutingClock Tree SynthesisStatic Timing AnalysisPhysical VerificationDRCLVSEMIPower PlanningPower Integrity

Job Summary: The Digital Physical Design Engineer / Architect is responsible for a physical implementation of IP, Subsystem or IC design. The individual is responsible from RTL synthesis to GDS imple...

March 27, 2026 View Details
Noida permanent
CAD SoftwareSoftware ArchitectureTechnical Problem SolvingProject PlanningDesign SpecificationsVendor Evaluation

Generic Job Description (not Job Level specific): The Design Methodologies and Tools Engineer / Architect develops and applies Computer Aided Design (CAD) software engineering methods, theories and re...

March 27, 2026 View Details
Bengaluru, KA, India permanent
Physical DesignTiming ClosurePower IntegrityClocking MethodologiesSOC 2 AuditCollaborationSubsystemsTechnology AdvancementCross-functionalCongestion Mitigation

Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offeri...

March 26, 2026 View Details

Physical Design Engineer

Intel Corporation

India, Bangalore permanent
Utility LayoutPhysical Array PlanningArea OptimizationDigital Block SynthesisCritical Wire AnalysisCompiler InternalsLayout VerificationProject ComplianceSOC ModernizationElectron Migration

Job Details: Job Description: • Develops custom layout design of analog blocks, complex digital, mixed signal blocks and standard cell libraries. • Performs detailed physical array planning, area op...

March 26, 2026 View Details

Digital IC Design Engineer – Physical Design -ASAP

Firmenname für EXPERT-Mitglieder sichtbar

Remote
TCL scriptingEnglish FluencyCadence Physical Design FlowRTL-to-gate synthesisClock-tree implementationLow-power optimization

We are seeking a hands-on Physical Design Engineer to join our Digital Transformation team on Project Leviathan. As a key contributor, you will implement Cadence AI functions in the IC design flow, op...

March 25, 2026 View Details
3 Locations permanent
AI AgentsPython ScriptingData AnalysisDebuggingPhysical MockupsCross-Functional CollaborationMeasurement OptimizationChiplet Layout DesignHigh-Quality Design

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. To...

March 24, 2026 View Details
US, TX, Austin permanent
C++ ProgrammingTiming OptimizationPower AnalysisEDA ToolsParallel ComputingMachine LearningHigh-Performance APIsInterdisciplinary CollaborationVLSI Algorithms DevelopmentPhysical Design Optimization

NVIDIA's success builds on a foundation of industry leading hardware. We achieve distinction through extensive design optimization, including combining the best of external EDA with highly optimized, ...

March 22, 2026 View Details

Physical Design Engineer

WinMaxSystemsCorporation

Archived San Jose, CA, United States contract
CADEDASynopsysICC IntegrationPrimeTimeDesign and code walkthroughsEMVCadence VirtuosoSystemVerilogStatic Timing AnalysisMulti Clock DesignsExtractions

Job Title: Physical Design Engineer Duties: We're seeking an experienced physical design engineer in the development of high-performance, low-power GPU top level design. Successful candidates ar...

December 3, 2016 View Details

Lead Physical Design Engineer

NXP Semiconductors

2 Locations permanent
Physical DesignPower IntegritySNATFloor PlanningPower Grid DesignPlace and RouteLow Power ImplementationClock Tree SynthesisTiming ClosureStatic Timing AnalysisEDA ToolsEM

Job Summary We are seeking a highly experienced PDN Engineer for iMCU & Connectivity to lead and contribute to the physical design and implementation of complex, high-performance semiconductor integr...

March 20, 2026 View Details

Lead Physical Design Engineer

NXP Semiconductors

Pune permanent
Physical DesignTiming ClosurePower AnalysisSignal IntegrityStatic Timing AnalysisPhysical VerificationEDA ToolsTclProblem Solving

Job Summary We are seeking a highly experienced Principal PD Engineer for iMCU & Connectivity to lead and contribute to the physical design and implementation of complex, high-performance semiconduct...

March 20, 2026 View Details
Israel permanent
Physical DesignEMIRPower IntegrityStatic AnalysisDynamic AnalysisElectromigrationIR DropSignal IntegrityRoot Cause AnalysisPower Grid ArchitectureChip-Package-System Co-analysis

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizati...

March 19, 2026 View Details
China, Shanghai permanent
IC DesignSynthesisFormal VerificationTiming ClosurePythonTCLCommunication SkillsConstraints DefinitionEDA Software

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. To...

March 19, 2026 View Details
Israel permanent
Technology BusinessesSignal IntegrityPower IntegrityStatic Timing AnalysisPhysical Design CADParasitic ExtractionAutomated RC Extraction FlowsCorrelation StudiesEDA VendorsFoundries

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizati...

March 18, 2026 View Details
Israel permanent
Static Timing AnalysisSTASemiconductor DesignTiming AnalysisDesign VerificationEDA ToolsMulti-Scenario STASCD ConstraintsClock Distribution NetworksProcess Corners

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizati...

March 18, 2026 View Details
Israel permanent
CADAutomationSignoffSynthesisSpace Domain PlanningStatic Timing AnalysisPower AnalysisPhysical VerificationTclPython

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizati...

March 18, 2026 View Details
Israel permanent
SoC DesignSystem-Level PerformanceSpace Domain PlanningClock Tree SynthesisPower DistributionPower IntegritySignal IntegrityThermal ManagementChip Top Physical DesignTiming SignoffPhysical Signoff

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizati...

March 18, 2026 View Details
Ottawa, , Canada permanent
ASIC DesignHigh-speed Digital DesignFloorplanningPower Circuit DesignPhysical VerificationExtractionTiming ClosurePower IntegritySynthesisEDA ToolsInnovus

Ottawa, Canada - 100% onsite The Senior ASIC Physical Design Engineer will be responsible for executing end-to-end digital physical design activities—from RTL or netlist input through final GDSI...

March 17, 2026 View Details
Taiwan, Hsinchu permanent
EDA ToolsPhysical DesignPower DistributionTiming ClosureVerificationPerlPythonTCLTiming Optimization

We are now looking for VLSI Physical Design Engineers in Hsinchu office, Taiwan.  We utilize latest process technology, advanced EDA tools, and sophisticated design methodology. We always work on the ...

March 17, 2026 View Details

SoC Physical Design Engineer

Intel Corporation

India, Bangalore permanent
Physical DesignSynthesisPlace and RouteClock Tree SynthesisStatic Timing AnalysisTiming ClosureFloor PlanningElectrical Rule CheckingUPFFormal Equivalence VerificationLayout VerificationPower Domain Analysis

Job Details: Job Description: The Role and Impact Intel's Devices Development Group is seeking a talented Physical Design Engineer to join our team in shaping the future of computing and semiconduct...

March 17, 2026 View Details

Staff Engineer, Physical Design

RenesasElectronics

Bengaluru, KA, India Hybrid permanent
Physical DesignTiming ClosureCongestion ManagementPower IntegrityPhysical ImplementationClock GatingUPFSoC FloorplanningClocking MethodologiesClock Domain PartitioningClock Tree ArchitectureSkew Management

Key Responsibilities • Lead MCU/subsystem/block-level closure efforts, focusing on timing closure, congestion resolution, power integrity, and physical implementation. • Collaborate closely with SoC-...

March 16, 2026 View Details
2 Locations permanent
VLSI Physical DesignASIC DesignPower OptimizationPerformance ImprovementArea OptimizationPlace and RouteTiming ClosurePythonPerl5nm Technology

We are now looking for a Senior Physical Design Engineer. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redef...

March 16, 2026 View Details
Bengaluru, KA, India permanent
ElectronicsPhysical DesignFloor PlanningPlace and RouteTiming AnalysisPower OptimizationTeam LeadershipProcess ImprovementInnovationCross-functional Collaboration

Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of ground...

March 13, 2026 View Details
6 Locations permanent
Electrical EngineeringComputer EngineeringPhysical DesignSynthesisFloorplanningPlacementRoutingTiming ConstraintsUPFLECLow-Power DesignClock Tree Synthesis

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. To...

March 12, 2026 View Details
India, Bangalore permanent
Timing AnalysisAdvanced Timing AnalysisTiming ConstraintsMethodologiesDesignCollaborationClock NetworksPVT Conditions

Job Details: Job Description: Performs timing analysis and timing optimization, generates, and verifies timing constraints, and fixes timing violations at chip/block level for SoCs. Conducts timing ...

March 12, 2026 View Details

CPU Physical Design Engineer

Intel Corporation

2 Locations permanent
Electrical EngineeringComputer EngineeringPhysical DesignSynthesisFloorplanningPlace and RouteCTSTiming ClosurePower DistributionReliabilityPower AnalysisNoise Analysis

Job Details: Job Description: About the Team: We created the Intel High Performance Processor (P-Core), a disruptive technology that enables a broad range of devices from entry PCs to high‑end serve...

March 11, 2026 View Details
2 Locations permanent
Physical DesignEDA ToolsSynthesisFloorplanningPlace and RouteCTSTiming ClosurePower DistributionReliabilityPower AnalysisNoise AnalysisVerification

Job Details: Job Description: About the Team: We created the Intel High Performance Processor (P-Core), a disruptive technology that enables a broad range of devices from entry PCs to high‑end serve...

March 11, 2026 View Details

Staff Physical Design Engineer

RenesasElectronics

Ho Chi Minh, , Vietnam permanent
Physical DesignEDA ToolsCommunicationTeam LeadershipTechnical ExpertiseProblem SolvingScripting LanguagesLogic DesignProject ManagementCultural Fit

• Physical layout design for chiptop, subsystem or partition level, including Synthesis, Place & Route, Physical verification, Static Timing Check, Power design network, Power Verification, ... • Coll...

March 4, 2026 View Details